The present invention relates to wafer probing, and more specifically, to fine pitch probing of high power integrated circuits with compliant bumps.
Controlled collapse chip connection (C4) is a method that interconnects semiconductor devices such as integrated circuits of a wafer with solder bumps. Semiconductor devices are typically tested in wafer form before dicing into individual chips for further packaging, test, and sale. For high powered devices, hundreds or thousands of solder bumps or pads on the chip are brought into contact with a wafer probe system attached to a test system. The wafer probe system has corresponding probe tips that make electrical connections to respective pads or solder bumps.
Two types of probe systems have been in use, compliant and rigid systems. Compliant probes are designed as springs, often in the form of a cantilever, buckling beam, or coil spring. The spring has the requisite force to break thru surface oxides and initiate electrical contact with a compliant bump or other pad, but needs to be relatively long in order to achieve the desired compliance to overcome non-planarities between the bumps and probes (i.e., the fact that all the bumps are not equidistant from corresponding probes). Thus, this type of probe is limited by the proximity of pads for which it can be used. Compliant probes also tend to be relatively expensive for large arrays, and the longer length results in poor electrical performance (inductance and resistance) and overheating at high currents.
Rigid probes, such as a Thin Film Interposer (TFI) probe presented Jun. 6 2007 at Southwest test Conference, are much shorter and relatively less expensive than compliant probes, but rely on the compliance (deformation) of the bumps to overcome non-planarities and make full contact to large arrays. Although the test chip would ideally be stationary during testing to prevent a loss of connection with the probe, various testing elements cause thermal and mechanical stresses during test that result in unwanted movement of the chip under test or probes. For example, during the various tests, the probe forces current through the solder bumps. The current flow causes temperature changes. This temperature change and resultant dynamics are generally more pronounced for higher power chips. This movement can cause loss of electrical contact when rigid probes are used to test plastically compliant bumps such as solder bumps.